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1 /*
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2 * mmx.h
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3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 */
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21 #ifndef AVCODEC_X86_MMX_H
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22 #define AVCODEC_X86_MMX_H
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23
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24 #warning Everything in this header is deprecated, use plain __asm__()! New code using this header will be rejected.
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25
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26
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27 #define mmx_i2r(op,imm,reg) \
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28 __asm__ volatile (#op " %0, %%" #reg \
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29 : /* nothing */ \
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30 : "i" (imm) )
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31
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32 #define mmx_m2r(op,mem,reg) \
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33 __asm__ volatile (#op " %0, %%" #reg \
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34 : /* nothing */ \
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35 : "m" (mem))
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36
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37 #define mmx_r2m(op,reg,mem) \
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38 __asm__ volatile (#op " %%" #reg ", %0" \
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39 : "=m" (mem) \
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40 : /* nothing */ )
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41
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42 #define mmx_r2r(op,regs,regd) \
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43 __asm__ volatile (#op " %" #regs ", %" #regd)
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44
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45
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46 #define emms() __asm__ volatile ("emms")
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47
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48 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
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49 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
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50 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
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51
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52 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
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53 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
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54 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
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55
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56 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
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57 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
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58 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
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59 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
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60
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61 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
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62 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
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63
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64 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
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65 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
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66 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
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67 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
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68 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
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69 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
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70
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71 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
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72 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
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73 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
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74 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
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75
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76 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
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77 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
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78 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
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79 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
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80
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81 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
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82 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
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83
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84 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
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85 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
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86
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87 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
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88 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
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89 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
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90 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
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91 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
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92 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
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93
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94 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
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95 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
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96 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
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97 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
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98 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
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99 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
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100
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101 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
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102 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
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103
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104 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
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105 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
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106
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107 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
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108 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
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109
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110 #define por_m2r(var,reg) mmx_m2r (por, var, reg)
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111 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
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112
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113 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
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114 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
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115 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
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116 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
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117 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
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118 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
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119 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
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120 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
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121 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
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122
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123 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
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124 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
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125 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
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126 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
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127 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
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128 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
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129
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130 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
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131 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
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132 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
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133 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
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134 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
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135 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
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136 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
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137 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
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138 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
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139
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140 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
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141 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
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142 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
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143 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
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144 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
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145 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
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146
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147 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
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148 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
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149 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
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150 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
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151
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152 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
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153 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
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154 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
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155 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
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156
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157 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
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158 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
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159 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
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160 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
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161 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
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162 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
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163
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164 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
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165 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
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166 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
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167 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
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168 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
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169 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
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170
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171 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
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172 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
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173
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174
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175 /* 3DNOW extensions */
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176
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177 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
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178 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
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179
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180
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181 /* AMD MMX extensions - also available in intel SSE */
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182
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183
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184 #define mmx_m2ri(op,mem,reg,imm) \
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185 __asm__ volatile (#op " %1, %0, %%" #reg \
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186 : /* nothing */ \
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187 : "m" (mem), "i" (imm))
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188 #define mmx_r2ri(op,regs,regd,imm) \
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189 __asm__ volatile (#op " %0, %%" #regs ", %%" #regd \
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190 : /* nothing */ \
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191 : "i" (imm) )
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192
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193 #define mmx_fetch(mem,hint) \
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194 __asm__ volatile ("prefetch" #hint " %0" \
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195 : /* nothing */ \
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196 : "m" (mem))
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197
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198
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199 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
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200
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201 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
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202
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203 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
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204 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
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205 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
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206 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
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207
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208 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
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209
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210 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
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211
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212 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
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213 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
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214
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215 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
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216 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
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217
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218 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
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219 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
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220
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221 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
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222 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
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223
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224 #define pmovmskb(mmreg,reg) \
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225 __asm__ volatile ("movmskps %" #mmreg ", %" #reg)
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226
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227 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
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228 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
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229
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230 #define prefetcht0(mem) mmx_fetch (mem, t0)
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231 #define prefetcht1(mem) mmx_fetch (mem, t1)
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232 #define prefetcht2(mem) mmx_fetch (mem, t2)
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233 #define prefetchnta(mem) mmx_fetch (mem, nta)
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234
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235 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
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236 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
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237
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238 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
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239 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
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240
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241 #define sfence() __asm__ volatile ("sfence\n\t")
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242
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243 /* SSE2 */
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244 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm)
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245 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm)
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246 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm)
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247 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm)
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248
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249 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm)
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250
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251 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg)
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252 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var)
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253 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd)
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254 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg)
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255 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var)
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256 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd)
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257
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258 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var)
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259
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260 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
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261 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
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262
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263 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd)
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264 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd)
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265
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266
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267 #endif /* AVCODEC_X86_MMX_H */
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