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comparison libavcodec/arm/rdft_neon.S @ 9:ea1ba68cf0ed

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update to match api changes + add sscc produced source
author Nina Engelhardt <nengel@mailbox.tu-berlin.de>
date Wed, 05 Jun 2013 14:43:26 +0200
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-1:000000000000 0:e022a3e5eb01
1 /*
2 * ARM NEON optimised RDFT
3 * Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22 #include "asm.S"
23
24 preserve8
25
26 function ff_rdft_calc_neon, export=1
27 push {r4-r8,lr}
28
29 ldr r6, [r0, #4] @ inverse
30 mov r4, r0
31 mov r5, r1
32
33 lsls r6, r6, #31
34 bne 1f
35 add r0, r4, #20
36 bl X(ff_fft_permute_neon)
37 add r0, r4, #20
38 mov r1, r5
39 bl X(ff_fft_calc_neon)
40 1:
41 ldr r12, [r4, #0] @ nbits
42 mov r2, #1
43 lsl r12, r2, r12
44 add r0, r5, #8
45 add r1, r5, r12, lsl #2
46 lsr r12, r12, #2
47 ldr r2, [r4, #12] @ tcos
48 sub r12, r12, #2
49 ldr r3, [r4, #16] @ tsin
50 mov r7, r0
51 sub r1, r1, #8
52 mov lr, r1
53 mov r8, #-8
54 vld1.32 {d0}, [r0,:64]! @ d1[0,1]
55 vld1.32 {d1}, [r1,:64], r8 @ d2[0,1]
56 vld1.32 {d4}, [r2,:64]! @ tcos[i]
57 vld1.32 {d5}, [r3,:64]! @ tsin[i]
58 vmov.f32 d18, #0.5 @ k1
59 vdup.32 d19, r6
60 pld [r0, #32]
61 veor d19, d18, d19 @ k2
62 vmov.i32 d16, #0
63 vmov.i32 d17, #1<<31
64 pld [r1, #-32]
65 vtrn.32 d16, d17
66 pld [r2, #32]
67 vrev64.32 d16, d16 @ d16=1,0 d17=0,1
68 pld [r3, #32]
69 2:
70 veor q1, q0, q8 @ -d1[0],d1[1], d2[0],-d2[1]
71 vld1.32 {d24}, [r0,:64]! @ d1[0,1]
72 vadd.f32 d0, d0, d3 @ d1[0]+d2[0], d1[1]-d2[1]
73 vld1.32 {d25}, [r1,:64], r8 @ d2[0,1]
74 vadd.f32 d1, d2, d1 @ -d1[0]+d2[0], d1[1]+d2[1]
75 veor q3, q12, q8 @ -d1[0],d1[1], d2[0],-d2[1]
76 pld [r0, #32]
77 vmul.f32 q10, q0, q9 @ ev.re, ev.im, od.im, od.re
78 pld [r1, #-32]
79 vadd.f32 d0, d24, d7 @ d1[0]+d2[0], d1[1]-d2[1]
80 vadd.f32 d1, d6, d25 @ -d1[0]+d2[0], d1[1]+d2[1]
81 vmul.f32 q11, q0, q9 @ ev.re, ev.im, od.im, od.re
82 veor d7, d21, d16 @ -od.im, od.re
83 vrev64.32 d3, d21 @ od.re, od.im
84 veor d6, d20, d17 @ ev.re,-ev.im
85 veor d2, d3, d16 @ -od.re, od.im
86 vmla.f32 d20, d3, d4[1]
87 vmla.f32 d20, d7, d5[1]
88 vmla.f32 d6, d2, d4[1]
89 vmla.f32 d6, d21, d5[1]
90 vld1.32 {d4}, [r2,:64]! @ tcos[i]
91 veor d7, d23, d16 @ -od.im, od.re
92 vld1.32 {d5}, [r3,:64]! @ tsin[i]
93 veor d24, d22, d17 @ ev.re,-ev.im
94 vrev64.32 d3, d23 @ od.re, od.im
95 pld [r2, #32]
96 veor d2, d3, d16 @ -od.re, od.im
97 pld [r3, #32]
98 vmla.f32 d22, d3, d4[0]
99 vmla.f32 d22, d7, d5[0]
100 vmla.f32 d24, d2, d4[0]
101 vmla.f32 d24, d23, d5[0]
102 vld1.32 {d0}, [r0,:64]! @ d1[0,1]
103 vld1.32 {d1}, [r1,:64], r8 @ d2[0,1]
104 vst1.32 {d20}, [r7,:64]!
105 vst1.32 {d6}, [lr,:64], r8
106 vst1.32 {d22}, [r7,:64]!
107 vst1.32 {d24}, [lr,:64], r8
108 subs r12, r12, #2
109 bgt 2b
110
111 veor q1, q0, q8 @ -d1[0],d1[1], d2[0],-d2[1]
112 vadd.f32 d0, d0, d3 @ d1[0]+d2[0], d1[1]-d2[1]
113 vadd.f32 d1, d2, d1 @ -d1[0]+d2[0], d1[1]+d2[1]
114 ldr r2, [r4, #8] @ sign_convention
115 vmul.f32 q10, q0, q9 @ ev.re, ev.im, od.im, od.re
116 add r0, r0, #4
117 bfc r2, #0, #31
118 vld1.32 {d0[0]}, [r0,:32]
119 veor d7, d21, d16 @ -od.im, od.re
120 vrev64.32 d3, d21 @ od.re, od.im
121 veor d6, d20, d17 @ ev.re,-ev.im
122 vld1.32 {d22}, [r5,:64]
123 vdup.32 d1, r2
124 vmov d23, d22
125 veor d2, d3, d16 @ -od.re, od.im
126 vtrn.32 d22, d23
127 veor d0, d0, d1
128 veor d23, d23, d17
129 vmla.f32 d20, d3, d4[1]
130 vmla.f32 d20, d7, d5[1]
131 vmla.f32 d6, d2, d4[1]
132 vmla.f32 d6, d21, d5[1]
133 vadd.f32 d22, d22, d23
134 vst1.32 {d20}, [r7,:64]
135 vst1.32 {d6}, [lr,:64]
136 vst1.32 {d0[0]}, [r0,:32]
137 vst1.32 {d22}, [r5,:64]
138
139 cmp r6, #0
140 popeq {r4-r8,pc}
141
142 vmul.f32 d22, d22, d18
143 vst1.32 {d22}, [r5,:64]
144 add r0, r4, #20
145 mov r1, r5
146 bl X(ff_fft_permute_neon)
147 add r0, r4, #20
148 mov r1, r5
149 pop {r4-r8,lr}
150 b X(ff_fft_calc_neon)
151 endfunc