nengel@2: /* nengel@2: * Copyright (c) 2010 Mans Rullgard nengel@2: * nengel@2: * This file is part of FFmpeg. nengel@2: * nengel@2: * FFmpeg is free software; you can redistribute it and/or nengel@2: * modify it under the terms of the GNU Lesser General Public nengel@2: * License as published by the Free Software Foundation; either nengel@2: * version 2.1 of the License, or (at your option) any later version. nengel@2: * nengel@2: * FFmpeg is distributed in the hope that it will be useful, nengel@2: * but WITHOUT ANY WARRANTY; without even the implied warranty of nengel@2: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU nengel@2: * Lesser General Public License for more details. nengel@2: * nengel@2: * You should have received a copy of the GNU Lesser General Public nengel@2: * License along with FFmpeg; if not, write to the Free Software nengel@2: * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA nengel@2: */ nengel@2: nengel@2: #ifndef AVCODEC_ARM_AAC_H nengel@2: #define AVCODEC_ARM_AAC_H nengel@2: nengel@2: #include "config.h" nengel@2: nengel@2: #if HAVE_NEON && HAVE_INLINE_ASM nengel@2: nengel@2: #define VMUL2 VMUL2 nengel@2: static inline float *VMUL2(float *dst, const float *v, unsigned idx, nengel@2: const float *scale) nengel@2: { nengel@2: unsigned v0, v1; nengel@2: __asm__ volatile ("ubfx %0, %4, #0, #4 \n\t" nengel@2: "ubfx %1, %4, #4, #4 \n\t" nengel@2: "ldr %0, [%3, %0, lsl #2] \n\t" nengel@2: "ldr %1, [%3, %1, lsl #2] \n\t" nengel@2: "vld1.32 {d1[]}, [%5,:32] \n\t" nengel@2: "vmov d0, %0, %1 \n\t" nengel@2: "vmul.f32 d0, d0, d1 \n\t" nengel@2: "vst1.32 {d0}, [%2,:64]! \n\t" nengel@2: : "=&r"(v0), "=&r"(v1), "+r"(dst) nengel@2: : "r"(v), "r"(idx), "r"(scale) nengel@2: : "d0", "d1"); nengel@2: return dst; nengel@2: } nengel@2: nengel@2: #define VMUL4 VMUL4 nengel@2: static inline float *VMUL4(float *dst, const float *v, unsigned idx, nengel@2: const float *scale) nengel@2: { nengel@2: unsigned v0, v1, v2, v3; nengel@2: __asm__ volatile ("ubfx %0, %6, #0, #2 \n\t" nengel@2: "ubfx %1, %6, #2, #2 \n\t" nengel@2: "ldr %0, [%5, %0, lsl #2] \n\t" nengel@2: "ubfx %2, %6, #4, #2 \n\t" nengel@2: "ldr %1, [%5, %1, lsl #2] \n\t" nengel@2: "ubfx %3, %6, #6, #2 \n\t" nengel@2: "ldr %2, [%5, %2, lsl #2] \n\t" nengel@2: "vmov d0, %0, %1 \n\t" nengel@2: "ldr %3, [%5, %3, lsl #2] \n\t" nengel@2: "vld1.32 {d2[],d3[]},[%7,:32] \n\t" nengel@2: "vmov d1, %2, %3 \n\t" nengel@2: "vmul.f32 q0, q0, q1 \n\t" nengel@2: "vst1.32 {q0}, [%4,:128]! \n\t" nengel@2: : "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst) nengel@2: : "r"(v), "r"(idx), "r"(scale) nengel@2: : "d0", "d1", "d2", "d3"); nengel@2: return dst; nengel@2: } nengel@2: nengel@2: #define VMUL2S VMUL2S nengel@2: static inline float *VMUL2S(float *dst, const float *v, unsigned idx, nengel@2: unsigned sign, const float *scale) nengel@2: { nengel@2: unsigned v0, v1, v2, v3; nengel@2: __asm__ volatile ("ubfx %0, %6, #0, #4 \n\t" nengel@2: "ubfx %1, %6, #4, #4 \n\t" nengel@2: "ldr %0, [%5, %0, lsl #2] \n\t" nengel@2: "lsl %2, %8, #30 \n\t" nengel@2: "ldr %1, [%5, %1, lsl #2] \n\t" nengel@2: "lsl %3, %8, #31 \n\t" nengel@2: "vmov d0, %0, %1 \n\t" nengel@2: "bic %2, %2, #1<<30 \n\t" nengel@2: "vld1.32 {d1[]}, [%7,:32] \n\t" nengel@2: "vmov d2, %2, %3 \n\t" nengel@2: "veor d0, d0, d2 \n\t" nengel@2: "vmul.f32 d0, d0, d1 \n\t" nengel@2: "vst1.32 {d0}, [%4,:64]! \n\t" nengel@2: : "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst) nengel@2: : "r"(v), "r"(idx), "r"(scale), "r"(sign) nengel@2: : "d0", "d1", "d2"); nengel@2: return dst; nengel@2: } nengel@2: nengel@2: #define VMUL4S VMUL4S nengel@2: static inline float *VMUL4S(float *dst, const float *v, unsigned idx, nengel@2: unsigned sign, const float *scale) nengel@2: { nengel@2: unsigned v0, v1, v2, v3, nz; nengel@2: __asm__ volatile ("vld1.32 {d2[],d3[]},[%9,:32] \n\t" nengel@2: "ubfx %0, %8, #0, #2 \n\t" nengel@2: "ubfx %1, %8, #2, #2 \n\t" nengel@2: "ldr %0, [%7, %0, lsl #2] \n\t" nengel@2: "ubfx %2, %8, #4, #2 \n\t" nengel@2: "ldr %1, [%7, %1, lsl #2] \n\t" nengel@2: "ubfx %3, %8, #6, #2 \n\t" nengel@2: "ldr %2, [%7, %2, lsl #2] \n\t" nengel@2: "vmov d0, %0, %1 \n\t" nengel@2: "ldr %3, [%7, %3, lsl #2] \n\t" nengel@2: "lsr %6, %8, #12 \n\t" nengel@2: "rbit %6, %6 \n\t" nengel@2: "vmov d1, %2, %3 \n\t" nengel@2: "lsls %6, %6, #1 \n\t" nengel@2: "and %0, %5, #1<<31 \n\t" nengel@2: "lslcs %5, %5, #1 \n\t" nengel@2: "lsls %6, %6, #1 \n\t" nengel@2: "and %1, %5, #1<<31 \n\t" nengel@2: "lslcs %5, %5, #1 \n\t" nengel@2: "lsls %6, %6, #1 \n\t" nengel@2: "and %2, %5, #1<<31 \n\t" nengel@2: "lslcs %5, %5, #1 \n\t" nengel@2: "vmov d4, %0, %1 \n\t" nengel@2: "and %3, %5, #1<<31 \n\t" nengel@2: "vmov d5, %2, %3 \n\t" nengel@2: "veor q0, q0, q2 \n\t" nengel@2: "vmul.f32 q0, q0, q1 \n\t" nengel@2: "vst1.32 {q0}, [%4,:128]! \n\t" nengel@2: : "=&r"(v0), "=&r"(v1), "=&r"(v2), "=&r"(v3), "+r"(dst), nengel@2: "+r"(sign), "=r"(nz) nengel@2: : "r"(v), "r"(idx), "r"(scale) nengel@2: : "d0", "d1", "d2", "d3", "d4", "d5"); nengel@2: return dst; nengel@2: } nengel@2: nengel@2: #endif /* HAVE_NEON && HAVE_INLINE_ASM */ nengel@2: nengel@2: #endif /* AVCODEC_ARM_AAC_H */