diff MasterLoop.c @ 109:659299627e70

counters done
author Nina Engelhardt
date Tue, 02 Aug 2011 17:16:12 +0200
parents 3bc3b89630c7
children 724c7a0b687f
line diff
     1.1 --- a/MasterLoop.c	Tue Jul 26 15:36:24 2011 +0200
     1.2 +++ b/MasterLoop.c	Tue Aug 02 17:16:12 2011 +0200
     1.3 @@ -147,29 +147,18 @@
     1.4                 int32 startStamp1, endStamp1;
     1.5                 saveLowTimeStampCountInto( startStamp1 );
     1.6                 #endif
     1.7 -               #ifdef MEAS__PERF_COUNTER
     1.8 +               #ifdef MEAS__PERF_COUNTERS
     1.9                 int lastRecordIdx = currSlot->procrAssignedToSlot->counter_history_array_info->numInArray -1;
    1.10                 CounterRecord* lastRecord = currSlot->procrAssignedToSlot->counter_history[lastRecordIdx];
    1.11                 lastRecord->req_core = thisCoresIdx;
    1.12 -               int cycles_fd = masterEnv->cycles_counter_fd[thisCoresIdx];
    1.13 -               int instrs_fd = masterEnv->instrs_counter_fd[thisCoresIdx];
    1.14 -               int nread;
    1.15 -               
    1.16 -               nread = read(cycles_fd,&(lastRecord->req_cycles),sizeof(lastRecord->req_cycles));
    1.17 -               if(nread<0){
    1.18 -                   lastRecord->req_cycles = 0;
    1.19 -               }
    1.20 -
    1.21 -               nread = read(instrs_fd,&(lastRecord->req_instrs),sizeof(lastRecord->req_instrs));
    1.22 -               if(nread<0){
    1.23 -                   lastRecord->req_instrs = 0;
    1.24 -               }
    1.25 +               saveCyclesAndInstrs(thisCoresIdx,lastRecord->req_cycles,lastRecord->req_instrs);
    1.26                 //End of task, start of next task
    1.27                 //print counters from last run
    1.28                 print_record(lastRecord);
    1.29 -               //create new entry in record array here
    1.30 +               //create new entry in record array
    1.31                 CounterRecord* newRecord = VMS__malloc(sizeof(CounterRecord));
    1.32                 newRecord->req_core = thisCoresIdx;
    1.33 +               newRecord->vp_id = currSlot->procrAssignedToSlot->procrID;
    1.34                 addToDynArray( (void*) newRecord, currSlot->procrAssignedToSlot->counter_history_array_info);
    1.35                 lastRecord = newRecord;
    1.36                 #endif
    1.37 @@ -183,65 +172,38 @@
    1.38                 addIntervalToHist( startStamp1, endStamp1,
    1.39                                          _VMSMasterEnv->reqHdlrHighTimeHist );
    1.40                 #endif
    1.41 -               #ifdef MEAS__PERF_COUNTER
    1.42 -
    1.43 -               nread = read(cycles_fd,&(lastRecord->sc_done_cycles),sizeof(lastRecord->sc_done_cycles));
    1.44 -               if(nread<0){
    1.45 -                   lastRecord->sc_done_cycles = 0;
    1.46 -               }
    1.47 -               nread = read(instrs_fd,&(lastRecord->sc_done_instrs),sizeof(lastRecord->sc_done_instrs));
    1.48 -               if(nread<0){
    1.49 -                   lastRecord->sc_done_instrs = 0;
    1.50 -               }
    1.51 +               #ifdef MEAS__PERF_COUNTERS
    1.52 +               //done with constraints check
    1.53 +               saveCyclesAndInstrs(thisCoresIdx,lastRecord->sc_done_cycles,lastRecord->sc_done_instrs);
    1.54 +               saveLowTimeStampCountInto(lastRecord->blocked_timestamp);
    1.55                 #endif
    1.56                 //============================================================
    1.57         }
    1.58        if( currSlot->needsProcrAssigned )
    1.59         {    //give slot a new virt procr
    1.60 -               #ifdef MEAS__PERF_COUNTER
    1.61 +               #ifdef MEAS__PERF_COUNTERS
    1.62                  //start assigner
    1.63 -               int cycles_fd = masterEnv->cycles_counter_fd[thisCoresIdx];
    1.64 -               int instrs_fd = masterEnv->instrs_counter_fd[thisCoresIdx];
    1.65                 uint64 tmp_cycles;
    1.66                 uint64 tmp_instrs;
    1.67 -               int nread=0;
    1.68 -               
    1.69 -               nread = read(cycles_fd,&tmp_cycles,sizeof(uint64));
    1.70 -               if(nread<0){
    1.71 -                   tmp_cycles = 0;
    1.72 -               }
    1.73 -
    1.74 -               nread = read(instrs_fd,&tmp_instrs,sizeof(uint64));
    1.75 -               if(nread<0){
    1.76 -                   tmp_instrs = 0;
    1.77 -               }
    1.78 +               saveCyclesAndInstrs(thisCoresIdx,tmp_cycles,tmp_instrs);
    1.79                 #endif
    1.80           schedVirtPr =
    1.81            (*slaveScheduler)( semanticEnv, thisCoresIdx );
    1.82 -               #ifdef MEAS__PERF_COUNTER
    1.83 +
    1.84 +         if( schedVirtPr != NULL )
    1.85 +          { currSlot->procrAssignedToSlot = schedVirtPr;
    1.86 +            schedVirtPr->schedSlot        = currSlot;
    1.87 +            currSlot->needsProcrAssigned  = FALSE;
    1.88 +            numSlotsFilled               += 1;
    1.89 +               #ifdef MEAS__PERF_COUNTERS
    1.90                 //end assigner
    1.91                 int lastRecordIdx = currSlot->procrAssignedToSlot->counter_history_array_info->numInArray -1;
    1.92                 CounterRecord* lastRecord = currSlot->procrAssignedToSlot->counter_history[lastRecordIdx];
    1.93                 lastRecord->assigning_core = thisCoresIdx;
    1.94                 lastRecord->start_assign_cycles = tmp_cycles;
    1.95                 lastRecord->start_assign_instrs = tmp_instrs;
    1.96 -               
    1.97 -               nread = read(cycles_fd,&(lastRecord->end_assign_cycles),sizeof(lastRecord->end_assign_cycles));
    1.98 -               if(nread<0){
    1.99 -                   lastRecord->end_assign_cycles = 0;
   1.100 -               }
   1.101 -
   1.102 -               nread = read(instrs_fd,&(lastRecord->end_assign_instrs),sizeof(lastRecord->end_assign_instrs));
   1.103 -               if(nread<0){
   1.104 -                   lastRecord->end_assign_instrs = 0;
   1.105 -               }
   1.106 +               saveCyclesAndInstrs(thisCoresIdx,lastRecord->end_assign_cycles,lastRecord->end_assign_instrs);
   1.107                 #endif
   1.108 -         if( schedVirtPr != NULL )
   1.109 -          { currSlot->procrAssignedToSlot = schedVirtPr;
   1.110 -            schedVirtPr->schedSlot        = currSlot;
   1.111 -            currSlot->needsProcrAssigned  = FALSE;
   1.112 -            numSlotsFilled               += 1;
   1.113 -            
   1.114              writeVMSQ( schedVirtPr, readyToAnimateQ );
   1.115            }
   1.116         }